Google's new Tensor G5 chip has failed to impress tech enthusiasts and users alike, with many flagging the chip's propensity to throttle. The flaw, however, might reside with Google's piecemeal approach to the Tensor G5's architecture.
The Architecture Of Google's Tensor G5 Chip
The new Tensor G5 chip has a convoluted architecture, consisting of:
- An eight-core CPU
- 1 high-performance Cortex-X4 core clocked at 3.78 GHz.
- 5 medium-performance Cortex-A725 cores clocked at 3.05 GHz.
- 2 efficiency Cortex-A520 cores clocked at 2.25 GHz.
- A fifth-generation TPU to handle machine learning and AI workloads.
- An Imagination IMG DXT-48-1536 GPU - a PowerVR-series integrated GPU clocked at 1.10 GHz, with theoretical performance comparable with other high-end mobile GPUs, including the Adreno 732/740 or ARM Mali G715 MP7, but without ray-tracing support.
- A Samsung Exynos 5G modem.
The chip is manufactured on TSMC's 3nm node, which delivers greater transistor density and improved performance and efficiency.
The Flaw Lies In Google's Piecemeal Approach To The Chip Design Process
As we've been noting over the past few weeks, Google's Tensor G5 chip is quick to heat up and throttle, which severely hampers gaming performance. While some flagged Google's move away from the ARM Mali GPU to an Imagination IMG DXT-48-1536 GPU for the chip's proclivity to throttle, this transition alone does not explain the entire story.
After all, the Tensor G5 throttles even during PlayStation 2 emulation, which relies heavily on the CPU instead of the GPU. As such, Google's piecemeal approach to the Tensor G5 might be to blame for the chip's subpar performance.
Consider the fact that Qualcomm's Snapdragon 8 Elite Gen 5 smokes the Tensor G5 in Geekbench 6 and 3DMark performance benchmark tests. Why, you might ask? Well, Qualcomm uses its custom Oryon CPU cores within the Snapdragon 8 Elite Gen 5, with the prime core clocked at 4.60 GHz and the performance cores clocked at 3.62 GHz.
Of course, Qualcomm has also paired higher clock speeds with tons of optimizations, including those related to its L2 cache sizes, with both types of cores boasting of a 12 MB L2 cache. In contrast, Google's Tensor G5 uses off-the-shelf Arm Cortex CPU cores that are not as fine-tuned or deeply optimized to work within the Pixel 10.
Similarly, while Google has worked closely with Imagination to develop the new IMG DXT-48-1536 GPU, Imagination retains full proprietary control over DXT-series drivers. This means that while Google can tweak certain elements of the GPU, especially in relation to AI loads and power management, it must rely on Imagination for foundational driver updates and hardware-specific code, again highlighting Google's inherent lack of control over fundamental optimizations.
In essence, Google's chip design strategy is akin to buying an off-the-rack suit and then paying for some fittings here and there. The suit remains functional but lacks the oomph factor associated with a designer suit, replete with customized stitching.
As long as Google continues to prioritize costs in its chip design strategy, its chips would likely lag behind competitors in terms of raw performance, despite incorporating some revolutionary elements such as the TPU.
About the author: Writing is my one incontrovertible passion. Over the past six years, he has authored over 2,200 distinct articles on financial and tech-related topics, spanning nearly 1 million words. And he has been a member of Wcctech mobile team since 2025. As an alumnus of the University of Toronto, Rotman Commerce Program, I bring nuance, in-depth knowledge, and a unique perspective to every topic that I cover. When I'm not writing, I'm traveling the world, exploring hidden confectionaries and restaurants as an aspiring food connoisseur.
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