Intel Begins Next-Gen Xeon E-Core “Clearwater Forest” CPU Enablement, Uses Darkmont Cores

Jan 23, 2024 at 11:35am EST
Intel Begins Next-Gen Xeon E-Core "Clearwater Forest" CPU Enablement, Uses Darkmont Cores 1

Intel has begun enablement for its next-gen E-Core Xeon CPUs codenamed Clearwater Forest which will adopt the Darkmont core architecture.

Intel's 2nd Gen All E-Core Clearwater Forest Xeon CPUs Will Feature Darkmont Cores Onboard

Intel has been ramping up developments on Linux, whether it involves the firm's "Arc" graphics lineup, or their mainstream consumer CPUs. However, server processors were something that was "relatively" lacking behind, but Intel has caught up on it by starting to push out early support for the firm's Clearwater Forest processors, which are slated to launch somewhere in 2025.

Related Story Intel Revives Raptor Lake Again With Core 7 230H And Core 5 205H, But Strips Out The Integrated Graphics Entirely

Phoronix reports that with Intel Linux engineers fulfilling the support for Intel's Sierra Forest lineup, which is the predecessor to Clearwater Forest, it seems like things won't take a break, as the team directly shifts the focus to the future.

Image Source: Kernel.org

In terms of what the patch involved, it was a "basic" one that added a new model number for Clearwater Forest Xeon CPUs, and they are now assigned " 0xDD (221)" in the kernel.

Another interesting addition, or probably a validation is the mention of "Atom Darkmont", which is expected to be the E-core architecture for these chips. These cores are expected to be an updated Skymont E-Core design and previous information suggests that Intel would retain the 288 core count and 288 threads which we will be getting with Sierra Forest chips too but those are based on the Crestmont E-Core architecture codenamed Sierra Glen.

While information about the Clearwater Forest lineup is slim for now, we are aware of the fact that it would feature Intel's 18A process, which is said to bring refinements to the RibbonFET technology to deliver another major leap in transistor and chip performance. We could see huge performance leaps in the processors, however, since they are scheduled for launch by 2025, we have still to see much more.

Intel Xeon CPU Families (Preliminary):

Family BrandingCoral RapidsDiamond RapidsClearwater ForestGranite RapidsSierra ForestEmerald RapidsSapphire RapidsIce Lake-SPCooper Lake-SPCascade Lake-SP/APSkylake-SP
Process NodeIntel 14A?Intel 18A-PIntel 18AIntel 3Intel 3Intel 7Intel 710nm+14nm++14nm++14nm+
Platform NameTBDIntel Oak StreamIntel Birch StreamIntel Birch StreamIntel Mountain Stream
Intel Birch Stream
Intel Eagle StreamIntel Eagle StreamIntel WhitleyIntel Cedar IslandIntel PurleyIntel Purley
Core ArchitectureTBDPanther Cove-XDarkmontRedwood CoveSierra GlenRaptor CoveGolden CoveSunny CoveCascade LakeCascade LakeSkylake
MCP (Multi-Chip Package) SKUsYesYesYesYesYesYesYesNoNoYesNo
SocketTBDLGA XXXX / 9324LGA 4710 / 7529LGA 4710 / 7529LGA 4710 / 7529LGA 4677LGA 4677LGA 4189LGA 4189LGA 3647LGA 3647
Max Core CountTBDUp To 192 P-CoresUp To 288Up To 128Up To 288Up To 64?Up To 56Up To 40Up To 28Up To 28Up To 28
Max Thread CountTBDUp To 192Up To 288Up To 256Up To 288Up To 128Up To 112Up To 80Up To 56Up To 56Up To 56
Max L3 CacheTBDTBDTBD480 MB L3108 MB L3320 MB L3105 MB L360 MB L338.5 MB L338.5 MB L338.5 MB L3
Memory SupportTBDUp To 16-Channel DDR5-9000+Up To 12-Channel DDR5-8000Up To 12-Channel DDR5-6400
MCR-8800
Up To 12-Channel DDR5-6400Up To 8-Channel DDR5-5600Up To 8-Channel DDR5-4800Up To 8-Channel DDR4-3200Up To 6-Channel DDR4-3200DDR4-2933 6-ChannelDDR4-2666 6-Channel
PCIe Gen SupportPCIe 6.0PCIe 6.0PCIe 5.0 (96 Lanes)PCIe 5.0 (136 Lanes)PCIe 5.0 (88Lanes)PCIe 5.0 (80 Lanes)PCIe 5.0 (80 lanes)PCIe 4.0 (64 Lanes)PCIe 3.0 (48 Lanes)PCIe 3.0 (48 Lanes)PCIe 3.0 (48 Lanes)
TDP Range (PL1)TBDTBDUp To 500WUp To 500WUp To 350WUp To 350WUp To 350W105-270W150W-250W165W-205W140W-205W
3D Xpoint Optane DIMMTBDTBDN/ADonahue PassN/ACrow PassCrow PassBarlow PassBarlow PassApache PassN/A
CompetitionTBDAMD EPYC VeniceAMD EPYC TurinAMD EPYC TurinAMD EPYC BergamoAMD EPYC Genoa ~5nmAMD EPYC Genoa ~5nmAMD EPYC Milan 7nm+AMD EPYC Rome 7nmAMD EPYC Rome 7nmAMD EPYC Naples 14nm
Launch2028-20292027202620242024202320222021202020182017

About the author: Muhammad Zuhair is a hardware and technology reporter for Wccftech, specializing in the semiconductor industry and the complex interplay between technology, manufacturing, and geopolitics. His coverage focuses on the corporate strategies and technological roadmaps of industry giants like TSMC, NVIDIA, Samsung, and Intel. Zuhair's expertise lies in deconstructing complex topics such as fabrication nodes (e.g., 2nm process), the economic impact of policies like the CHIPS Act, and the strategic development of AI infrastructure from NVIDIA, AMD and Intel.

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