Google’s Tensor G6 Is Borrowing Ideas From MediaTek’s Dimensity 9500

Dec 14, 2025 at 11:04am EST
A close-up of a Google-branded processor chip with circuitry details visible.

Google's Tensor G5 chip is a bland porridge, one that manages to quench your hunger, but never satiates your cravings. It does its job, but only with the sepulchral undertones of an aged cemetery caretaker. In contrast, MediaTek's Dimensity 9500 chip has panache and all of the bubbly effervescence of carefree youth, having managed to outpace and outcompete Google's Tensor G5 chip in every benchmark test, largely by taking daring risks with its architecture.

Now, some of the Dimensity 9500's proclivity for risk-taking and willingness for experimentation appears to be rubbing off on Google's Tensor chip designers, especially as the upcoming Tensor G6 chip is expected to borrow two key ideas from the Dimensity 9500 chip.

Related Story Qualcomm’s Split 2nm Chipset Strategy Is Paying Off, But That’s Bad News For Its Rival MediaTek

The expected architecture of Google's Tensor G6 chip

Before going further, let's first go over the major design elements that underpin the Google Tensor G5 chip and its Dimensity 9500 rival:

CPU

GPU

AI

Now that we have some inkling as to the current chip design approach adopted by Google and MediaTek for their bespoke SoCs, let's go over the broader architectural outlines of the Tensor G6 chip, which bears the internal codename Malibu and is expected to debut in the second half of 2026 by leveraging TSMC's 2nm chip fabrication process.

Tensor G6 CPU cores: An 8-core architecture

  1. 1 x ARM Cortex-X930 "Super Core."
  2. 6 x ARM Cortex-A730 "Big Cores" for performance.
  3. 1x ARM Cortex-A5xx-series "Little Core" for efficiency.

Do note that ARM has changed its naming strategy, so the actual chip might launch with cores that are named differently from what is described here.

Tensor G6 GPU

  1. The 3-core IMG CXT, which is older than the IMG DXT GPU on the Tensor G5!

AI capabilities of the Tensor G6 chip

  1. A bespoke TPU to handle major AI workloads.
  2. A nano-TPU to handle relatively simple AI tasks much more efficiently.

Tensor G6 modem

  1. Google is expected to move away from a Samsung modem and towards MediaTek's M90 modem for the Tensor G6, bringing support for downlink speeds of up to 12Gbps.

Two key architectural elements that Google's Tensor G6 appears to be borrowing from MediaTek's Dimensity 9500

Lesson #1: Efficiency cores are overrated

We explained in a recent post how MediaTek was able to boost the performance of its Dimensity chips by doing away with efficiency cores. Well, Google appears to be incorporating this lesson, at least partially, in its upcoming Tensor G6 chip.

After all, the new SoC is expected to move away from the 1+5+2 core layout of the Tensor G5 chip and towards a new layout that consists of 1+6+1 cores, essentially eliminating an efficiency core for an extra ARM "Big Core." This tweak should help boost the overall performance of the Tensor G6 chip, especially when paired with TSMC's 2nm process.

Lesson #2: If you have to use ARM generic cores, use the latest ones

One of the primary reasons behind the performance discrepancy between MediaTek's Dimensity 9500 chip and Google's Tensor G5 SoC can be traced back to the fact that the former uses ARM's latest cores while the latter decided to go with ARM generic cores that are now over two and a half years old.

For instance, the ARM Cortex-X4, which is used as the sole Big Core on the Tensor G5, was announced all the way back in May 2023!

Now, however, it appears that Google is pivoting towards relatively recent ARM cores, which should help in mitigating a major performance-related irritant that has plagued Google's SoCs for a while now.

Interestingly, Google's newfound willingness to transition towards more recent ARM CPU cores does not appear to extend to the Tensor G6 chip's GPU, which is expected to be an even older GPU than the one found on the Tensor G5! But then, it wouldn't be Google if it did not try to somehow hobble its own SoC.

Note: The post has been updated with clarification on MediaTek's new naming convention for its CPU cores.

About the author: Writing is my one incontrovertible passion. Over the past six years, he has authored over 2,200 distinct articles on financial and tech-related topics, spanning nearly 1 million words. And he has been a member of Wcctech mobile team since 2025. As an alumnus of the University of Toronto, Rotman Commerce Program, I bring nuance, in-depth knowledge, and a unique perspective to every topic that I cover. When I'm not writing, I'm traveling the world, exploring hidden confectionaries and restaurants as an aspiring food connoisseur.

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