A recent article alleged that AMD's Fiji XT will be limited to 4GB of memory due to the size of the interposer used for the Fiji XT GPU. In this editorial piece I'll be investigating this claim to see if it holds any validity.
First of all let's take a brief overview of Fiji XT's memory system that's been leaked a while back. The leak suggests that the Fiji XT powered card will use four High Bandwidth Memory modules. High Bandwidth Memory or HBM for short is a new wide I/O JDEC high performance memory spec co-developed by SK Hynix and AMD.
Is AMD's RFiji XT Limited to 4GB of Memory ? Lets Find Out
The first generation of the memory standard will allow for a 4-Hi stack. Each of the four stacked memory dies has a capacity of 256 Megabyte / 2 Gigabit, amounting to a total of 1 Gigabyte per stack. This 1GB memory module runs at a 1Ghz clock speed but is capable of 128GB/S bandwidth. This is achieved by using Through Silicon Vias or TSVs for short. Which simply put allow for an extremely wide memory interface resulting in a very high amount of bandwidth.
Both claims however are wrong. The Pascal test vehicle that Nvidia showcased back in GTC of last year, clearly shows Pascal paired with HBM in a 2.5D package. The memory sits on the interposer next to the Pascal GPU instead of being stacked on-top of it. So Pascal will utilize 2.5D stacking rather than 3D stacking.
AMD's prototypes show the same thing, HBM would be stacked on the same interposer as the processor. Which brings us to the other false claim which states that more than 4GB of HBM won't fit on an interposer with a large chip such as FIji XT. Bryan Black, AMD's head of the die stacking program gave a talk titled "Die Stacking and The System" in hotchips of 2012. In an answer to a question Black stated that engineers can use interposers of any size to meet their needs. They can be as large as 1600mm² or even 2000mm² to fit as many components as needed. So the article's claim that interposers can only be as large as the maximum reticle size is also inaccurate.
AMD's own illustrations show eight individual HBM cubes stacked on the same interposer as the processor. In Nvidia's Pascal test vehicle we can also see that there's still room left even with a large GPU to add at least four more memory cubes. So the area of the interposer is certainly not a technical limitation.
The leaked specifications suggest that Fiji XT actually has a more reasonable 4096bit memory interface and 4GB of HBM running at 1.25Gbps. Which would deliver 640GB/S of bandwidth, more than enough to feed a 4096SP GPU. There are however two viable methods which AMD can use to double the memory for Fiji XT from 4GB to 8GB. The first would be to simply double the number of HBM cubes from 4 to 8. If Fiji XT does indeed have a 4096bit interface this would ensure a doubling in capacity at a constant 640GB/s bandwidth because every couple of HBM cubes would have to share one 1024bit wide memory slice.
The other method by which AMD can double the memory capacity would be to use HBM cubes with double the density, i.e. 2GB cubes instead of 1GB cubes. Currently, first generation HBM only comes in 4-Hi 1GB cubes. However Hynix plans to introduce new iterations with larger capacities per die as well as more stacked dies per cube. Both of those solutions would enable AMD to introduce GPUs with more VRAM, even up to 16GB, while maintaining that same 4096bit interface at 640GB/S.
There are a few exceptions to this such as with the 6GB GTX Titan compared to the GTX 780 Ti or 780. The GTX Titan and Titan Black come with double the amount of available VRAM compared to the GTX 780 and 780 Ti. And Nvidia chose to achieve that by doubling the number of GDDR5 memory chips from 12 to 24. Instead of maintaining the number at 12 and using higher capacity GGDR5 chips.
But for Fiji XT we're betting on the former, as in when SK Hynix rolls out 2GB cubes AMD will be able to make 8GB versions of Fiji without much trouble.
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