The AMD Zen 5 CPU powering the Ryzen 9000 "Granite Ridge" CPUs has received new high-res die shots from Fritzchens Fritz, revealing the mysteries of the brand-new Zen architecture, and what AMD is planning to offer in the future.
AMD Zen 5 Core Architecture Pictured In Detailed Die Shots, Full Granite Ridge "Ryzen 9000" CPU Dissection
The die shots come from Fritzchens Fritz who is known for sharing high-resolution close-ups of various CPUs and GPUs. The incredibly detailed die shots meant that a Ryzen CPU needed to be sacrificed so that it's CCD could be extracted for a visual close-up.
The processor used was the Ryzen 5 9600X which features a single Zen 5 CCD and a single IOD. The singular Zen 5 CCD was then pictured in all its glory.
Some new High-Res Die-Shots. This time: AMD Ryzen Zen 5 (Granite Ridge) which offers interesting changes for the 3D V-Cache.
For more details, I recommend the newest video by @highyieldYT, which provides a interesting analysis. pic.twitter.com/wTIWw8mk0t
— Fritzchens Fritz (@FritzchensFritz) October 6, 2024
Starting with the details, we know from previously public information that each Zen 5 CCD, Eldora, has a die size of 70.6mm2 and features 8.315 Billion transistors while being fabricated on the TSMC N4P process node. We won't go into the depths of the architecture since we have already detailed it fully here but Nemez at X followed up by providing annotated pictures of the Granite Ridge CCD and IOD which can be seen below:
As expected, the AMD Zen 5 CCD on the Granite Ridge CPU is the only of the two dies that's been changed from the previous Zen 4 lineup (Raphael) while the IO die remains the same and uses a TSMC 6nm process node.
The most interesting details about the AMD Zen 5 CCD for Granite Ridge CPUs were spotted by High Yield who worked with Fritzchens Fritz to dig deeper into the CCD design. On closer inspection, it was revealed that Zen 5 CCDs have a much lower amount of TSVs or Through Silicon Vias than the previous generation Zen 4 & Zen 3 offerings.
Plus the positioning of the TSVs within the L3 cache might stress out the CCD itself so it is speculated that AMD might go for a 2-Hi stacked 3D V-Cache design to counter the impacts. It also opens up the room for a higher 3D V-cache amount but that is very unlikely given what we have heard, at least for the AMD Ryzen 7 9800X3D which should retain a similar V-cache count as the 7800X3D. The addition of an extra V-Cache is not just more fragile but also raises complexities and increases costs & which is something that AMD doesn't want to go with the Ryzen 7 chips considering their mainstream popularity. The option might be introduced in a future or higher-end part.
The AMD Zen 5 CCDs, the core architecture, and the brand new features will also be adopted in a range of other lineups including Strix, Strix Halo, Fire Range Krackan, Turin, Turin X3D, Turin-Dense & more so stay tuned as the Zen 5 rollout has just begun.
About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.
Follow Wccftech on Google to get more of our news coverage in your feeds.
