AMD LLVM Compiler Ends Support For The Iconic 3DNow! CPU Instruction Set

Jul 19, 2024 at 02:10pm EDT

AMD's LLVM compiler has dropped support for the iconic 3DNow! instruction set, which was first rolled out with AMD's K6-2 CPUs to compete with Intel's competition at that time.

AMD's 3DNow! Instruction Set Took Multimedia and Graphics Capabilities To New Heights With The Old K6-2 CPUs, Support Now Ended

AMD's 3DNow! instruction set was a move to compete with Intel's MMX instruction set, both of which are designed for multimedia and graphics applications on their respective processors. AMD's iconic instruction set was initially released back in 1998, with the sole aim of competing with Intel in the battle of floating-point calculations, which are common in 3D graphics and video processing. The 3DNow! instruction set was compliant under x86 architecture directly without the need for any modification, given that it was available.

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Image Source: LLVM Project (via GitHub)

However, the instruction set was later replaced by the series SSE extensions, which were more capable and, ultimately, 3DNow! became obsolete over time, and compilers across the web started to drop support for it. Despite not being in use for years, AMD's LLVM compiler maintained support for the instruction set, however, it looks like Team Red has given up on its iconic instruction set.

This set of instructions was only supported by AMD chips starting in the K6-2 (introduced 1998), and before the "Bulldozer" family (2011). They were never much used, as they were effectively superseded by the more-widely-implemented SSE (first implemented on the AMD side in Athlon XP in 2001).

This is being done as a predecessor towards general removal of MMX register usage. Since there is almost no usage of the 3DNow! intrinsics, and no modern hardware even implements them, simple removal seems like the best option.

- LLVM commit via Github

Interestingly, you can still access 3DNow! in Assembly code on the LLVM compiler but the mainstream options are removed, marking the formal end of the instruction end.

News Source: Phoronix

About the author: Muhammad Zuhair is a hardware and technology reporter for Wccftech, specializing in the semiconductor industry and the complex interplay between technology, manufacturing, and geopolitics. His coverage focuses on the corporate strategies and technological roadmaps of industry giants like TSMC, NVIDIA, Samsung, and Intel. Zuhair's expertise lies in deconstructing complex topics such as fabrication nodes (e.g., 2nm process), the economic impact of policies like the CHIPS Act, and the strategic development of AI infrastructure from NVIDIA, AMD and Intel.

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