AMD confirms that its 6th Gen EPYC Verano CPUs will be the first to utilize SOCAMM2 memory, further expanding its perf/W AI solutions.
AMD Confirms SOCAMM2 Memory Support With 6th Gen EPYC Verano CPUs, Tightening The DRAM Supply Chain Even More
Last year, AMD confirmed its next-gen EPYC Verano CPUs for AI at rack scale. These chips will be coupled with the company's next-gen MI500 accelerators and will come together using Vulcano interconnect. At the time, AMD didn't disclose much, and the first impression was that Verano would likely use Zen 7 cores. But that isn't the case, as AMD recently confirmed that Verano is still part of the 6th Gen EPYC family, the same as Venice, which features Zen 6 cores.
With that out of the way, we can come back to an interesting reveal that was missed out recently. That is the fact that AMD's EPYC Verano CPUs will be the first to support SOCAMM2 memory. SOCAMM2 is a relatively new memory form factor that currently harnesses LPDDR5X DRAM modules and offers high bandwidth, high capacity, and much better power efficiency in a compact form factor. This allows tech vendors to ensure maximum memory density.
For example, Micron recently shipped SOCAMM2 modules to various partners working on infrastructure for AI. These modules house 256 GB densities and are specifically targeted towards AI at scale. NVIDIA's Vera CPU solution features 16 of these modules with four LPDDR5X modules each for a total of 64 DRAM packages.
The 6th generation AMD EPYC Server CPU family will support industry-standard DDR5 RDIMM and MRDIMMs based memory. It will also offer SKUs that support the new LPDDR5x SOCAMM2 based memory.
In the server market, AMD plans to first support LPDDR5X SOCAMM2 memory with the 6th Generation AMD EPYC Server CPU code-named “Verano” available in 2027. Verano will be the optimized host CPU for the future generations of AMD Instinct GPUs and leverage LPDDR5X SOCAMM2 to deliver optimized Perf/System-Watt in AI Rack Scale Solutions from AMD. This combination of bandwidth, power efficiency, and serviceability is expected to make LPDDR5X SOCAMM2 components a valuable, complementary component of next-generation AI and data center infrastructure.
SOCAMM2 modules containing LPDDR5X memory are designed to consume less energy and provide a smaller physical form factor and a new horizontal interconnect to the system board. This allows for memory that:
- Takes up less physical space inside the server; and
- Sits horizontally to allow for better system airflow or simpler cold plate designs.
via AMD
AMD also confirms that AMD EPYC Verano will be available in 2027 and will be the optimized host CPU for future generations of AMD Instinct accelerators, such as the MI500 series we mentioned above. Now here's the interesting bit: AMD isn't the only one that will be using SOCAMM2 memory.
Like AMD, NVIDIA's next-gen Vera Rubin and Vera CPX platforms also feature SOCAMM2 LPDDR5X memory. And LPDDR is also the prime choice of several upcoming AI accelerators, such as Tesla's A15, which was recently revealed, and also several Intel inference-optimized GPU solutions.
This worsens the already-worse situation for LPDDR since the overall memory supply chain is tight, and the constraints aren't seeing any sign of relief. With more dense solutions rolling out in the future, it is not only going to affect server and PC audiences, but low-power DDR memory is also a vital component for smartphones, and with a large supply heading to AI racks, this could further disrupt the tech industry as a whole.
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