Mainstream Intel Core Processors will not support AVX 512 from Skylake – Only Xeon
It was originally thought that AVX 512 will be available on every Skylake processor but that doesnt appear to be the case because a report form bitsandchips.it reveals that only Xeon based processors are going to be supporting it - ie mainstream support fort the SIMD will be disabled. Even Xeon processors will have to wait for Cannonlake to enjoy the full feature set.
Intel Skylake-S Processors will have AVX 512 disabled
Instructions don't really matter to the average laymen but they can be an absolute deal breaker for certain customized business and HPC. We were expecting AVX 512 to appear by Skylake, but this new update makes things rather interesting. According to it, Cannonlake processors will be the first processors to have AVX 512 support from launch. Here it the comparison table for instructions.
|CPU||Skylake||Skylake Xeon||CannonLake||Knights Landing||Haswell|
Ofcourse when I say mainstream processors wont have AVX 512, what I really mean is that it will be disabled. They will only be enabled on the Skylake SKUs on the Xeon platform. So it looks like the new iteration of Intel's offerings will not have any significant new instruction set, mostly all the old stuff. Yet we have word that it is going to be one hell of an architecture to look out for, because for the first time in many years, Intel is simply refusing to divulge the slightest (information even under NDA). This ‘above top secret’ attitude seems out of place since the process was already introduced with Broadwell and is supposed to be just a ‘Haswell-equivalent’ for Broadwell. Something that definitely appears to not be the case.
The level of secrecy Intel is maintaining makes it very clear that they are bringing something brand new with the Skylake uarch. The only question is what? When posed with the same question, our source answered that he suspects it’s MorphCore, something that would not only make logical and rationalistic sense but would also be a very practical approach to solving the multiple configuration problem.