Intel Preparing Something ‘Big’ and ‘Disruptive’ with Skylake Microarchitecture

Okay, so we are finally here at the last piece of our talks with an Industry Insider. Needless to say, I will not be revealing his name/designation/company for obvious reasons, so you will just have to take our word on this. I have saved the best news for last, because our source had me convinced that something really big is coming with Intel's Skylake microarchitecture. While we don't know what exactly this 'disruptive' feature will be, our source was kind enough to give us his suspicion (read: educated guess) on what it might be: MorphCore.

Intel Broadwell and Skylake PlatformA stock render of a die, something which will get more interesting with Skylake. @Intel Public Domain

Skylake has something brand new - Intel keeping an above top secret attitude even after NDA

One of the surprising things that our source mentioned was that Intel has always been fairly lenient about information after the NDA is signed. However, this time, for the first time in many years, they simply refuse to divulge the slightest information even under NDA. This 'above top secret' attitude seems out of place since the process was already introduced with Broadwell and is supposed to be just a 'Haswell-equivalent' for Broadwell. Something that definitely appears to not be the case.

The level of secrecy Intel is maintaining makes it very clear that they are bringing something brand new with the Skylake uarch. The only question is what? When posed with the same question, our source answered that he suspects it's MorphCore, something that would not only make logical and rationalistic sense but would also be a very practical approach to solving the multiple configuration problem. Intel currently has a different core for Mainstream, Desktop, Mobile and Server Market and even one for HPC (Xeon Phi). However, utilization of MorphCore could minimize the different core designs and could theoratically universalize a standard core config. Basically one core configuration to rule them all (or atleast most of them).

Now it would undoubtedly be quite an Industry changer if this happens. Other contenders to an architectural revamp include the VISC design, something that is out of the scope of this article but definitely a possibility.

There is actually a research paper out there on Morphcore for those interested, but I will jot down the important features: This paper proposes MorphCore, a unique approach to satisfying  competing requirements, by starting with a traditional high per-formance out-of-order core and making minimal changes that can transform it into a highly-threaded in-order SMT core when necessary. The result is a microarchitecture that outperforms an aggressive 4-way SMT out-of-order core, “medium” out-of-order cores, small in-order cores, and CoreFusion. - Source

Okay, so lets talk MorphCore. A little context firstly. There are two main extremes to core configuration: big out-of-order execution cores with good single thread performance but poor power efficiency for multi threaded programs or small cores with less than acceptable single thread performance but high power efficiency. To solve this particular dilemma, the Industry is exploring ACM Processors or Assymetric Chip Multiprocessors. Basically, in this design a few big OoO cores are combined with many small cores - a hybrid if you will. However, the physical constraints that come into play with combining big cores with small cores are somewhat of a hindrance.

Similarly another solution that has been proposed is the use of many small cores that combine to form one large core as required - the only problem being the one large core becomes increasingly power inefficient and usually suffers from low performance - this approach is known as CoreFusion.  Now cue MorphCore. Inverting the idea and basically having one large core that then divides itself into many small virtual cores is what this technology is all about. And it will support both out of order execution and in order execution as required with amazing results. Morphcore will utilize in-order SMT primarily and will be able to exploit highly parallel code (which was something many small cores were good at if you recall) as well as high single threaded performance.

Now here is where it gets interesting, remember what I told you about AMD's Zen? Our source stated that he is fairly certain AMD knows about this 'new' feature and will try to incorporate it into Zen high performance micro-architecture. That concludes our series of 4, and though we still have some months remaining before Skylake's launch, the upcoming iteration just got all the more interesting.

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