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AMD Rumored To Offer Up To 128 Zen 4 Cores & 12-Channel DDR5-5200 Memory Support In Next-Gen EPYC & Threadripper CPUs

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A new rumor has just popped up on Chiphell according to which AMD's next-gen Threadripper and EPYC CPUs could pack up to 128 cores based on the Zen 4 architecture.

AMD Next-Gen EPYC & Threadripper CPUs Rumored To Feature 128 Cores Based on Zen 4 Architecture, 12-Channel DDR5-5200 Memory

So far, we know that AMD is working on its EPYC Genoa lineup of server processors which will be offering up to 96 cores and 192 threads. The EPYC Genoa lineup will be based on the Zen 4 cores and we are also expecting to see a new server family before that known as Milan-X which will be utilizing the X3D chiplet packaging technology. Milan-X would be based on the Zen 3 architecture.

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That's what we mainly know about the two Zen 3 and Zen 4 powered EPYC families. AMD will also be introducing Ryzen Threadripper and Threadripper Pro chips based on the Zen 3 architecture as the company strengthens its workstation portfolio but now a new rumor has been running wild for a few weeks.

There were multiple rumors that pointed that AMD's next-gen EPYC Genoa lineup would feature a maximum of 128 cores instead of 96 as previously reported. AMD has so far revealed no official details but based on the mockup renders from ExecutableFix, we saw that the Genoa chips would house 12 CCD's with Zen 4 cores. Since Zen 4 doesn't bump up the core count per CCD, we get a total of 96 cores. A chip with 128 cores would be a completely different beast but it looks like the new rumor does state that it won't be called Genoa.

The new CPUs, whether they be a part of the next-gen EPYC Server or HEDT Ryzen Threadripper family, will feature up to 128 cores packed within 16 CCDs that are powered by the Zen 4 core architecture. The CPU will also feature support for 12-channel DDR5-5200 memory. The CPU will feature a very different packaging design considering there's little to no space left on the Genoa 'LGA6096' CPU socket to accommodate any more CCDs but then again, we have only seen a mock-up and the real chip might feature enough room for up to 16 CCDs.

This is all just a rumor but it's definitely going to be one of the fastest CPUs on the market once it launches with a core count that might remain unchallenged for years to come.

AMD EPYC CPU Families:

Family NameAMD EPYC VeniceAMD EPYC TurinAMD EPYC SienaAMD EPYC BergamoAMD EPYC Genoa-XAMD EPYC GenoaAMD EPYC Milan-XAMD EPYC MilanAMD EPYC RomeAMD EPYC Naples
Family BrandingEPYC 7007?EPYC 7006?EPYC 7004?EPYC 7005?EPYC 7004?EPYC 7004?EPYC 7003X?EPYC 7003EPYC 7002EPYC 7001
Family Launch2025+2024-2025?20232023202320222022202120192017
CPU ArchitectureZen 6?Zen 5Zen 4Zen 4CZen 4 V-CacheZen 4Zen 3Zen 3Zen 2Zen 1
Process NodeTBD3nm TSMC?5nm TSMC5nm TSMC5nm TSMC5nm TSMC7nm TSMC7nm TSMC7nm TSMC14nm GloFo
Platform NameTBDSP5 / SP6SP6SP5SP5SP5SP3SP3SP3SP3
SocketTBDLGA 6096 (SP5)
LGA XXXX (SP6)
LGA 4844LGA 6096LGA 6096LGA 6096LGA 4094LGA 4094LGA 4094LGA 4094
Max Core Count384?25664128969664646432
Max Thread Count768?51212825619219212812812864
Max L3 CacheTBDTBD256 MB?TBD1152 MB?384 MB?768 MB?256 MB256 MB64 MB
Chiplet DesignTBDTBD8 CCD's (1CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD8 CCD's with 3D V-Cache (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (2 CCX's per CCD) + 1 IOD4 CCD's (2 CCX's per CCD)
Memory SupportTBDDDR5-6000?DDR5-5200DDR5-5600?DDR5-5200DDR5-5200DDR4-3200DDR4-3200DDR4-3200DDR4-2666
Memory ChannelsTBD12 Channel (SP5)
6-Channel (SP6)
6-Channel12 Channel12 Channel12 Channel8 Channel8 Channel8 Channel8 Channel
PCIe Gen SupportTBDTBD96 Gen 5160 Gen 5160 Gen 5160 Gen 5128 Gen 4128 Gen 4128 Gen 464 Gen 3
TDP RangeTBD480W (cTDP 600W)70-225W320W (cTDP 400W)200W (cTDP 400W)200W (cTDP 400W)280W280W280W200W
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