AMD’s Renoir SOC has just got its first legitimate platform block diagram leaked courtesy of the venerable Igor over at Igor’s Lab. The source in question has a spotless track record with leaks and we have no reason to doubt the legitimacy of the slide. The AMD Renoir SoC block diagram (for the mobility platform) reveals that dedicated GPUs will only have access to 8 lanes of PCIe 3.0 which could run high-end GPUs into a bandwidth bottleneck (think RTX 2060 Super and above). AMD Renoir ‘mobility’ SoC utilizes only 8 PCIe 3.0 lanes for discrete graphics, could turn the … Continue reading AMD Renoir (Mobility) PCIe 3.0 Limited To 8x – Could Bottleneck GPUs Above An NVIDIA RTX 2060 Super