Nvidia Drive PX 2 Uses Integrated and Discrete Pascal GPU Cores – 24 DL TOPS, 8 TFLOPs and Up To 4GB GDDR5 [Updated]

Usman Pirzada
Posted Apr 5, 2016
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Nvidia’s GTC 2016 event is going on as we speak and the company has revealed quite a few details about its upcoming Drive PX 2 board which will be the flagship SKU for the automobile and autonomous industry. The board will feature both integrated and discrete Pascal GPUs on board for a peak performance of 24 DL TOPS or 8 TFLOPS.

Nvidia demos Drive PX 2 at GTC 2016 – features a CPU/GPU complex with integrated and dedicated Pascal cores

Lets start with the basic specifications. Nvidia is claiming peak performance of 8 TFLOPs (FP32) and up to 24 DL TOPS. While I am sure the first metric is familiar, the second is one of Nvidia’s own design and refers to “Deep Learning – Tera-Operations Per Second”. This means that the Drive PX 2 can do 24,000,000,000,000 deep learning operations per second. This is a pretty huge number and considering that the automobile industry will be leaning more and more heavily on DNNs for auto-pilot and autonomous driving applications – this is an important number.

Moving on, the CPU complex of the Drive PX 2 board is as follows: There are 2 Denver2 cores present plus 4x Cortex A57 cores. The architecture used is ARM v8 64 bit. The CPU Complex will have upto 8 GB of LPDDR4 memory (UMA) with up to 50 GB/s bandwidth.  Nvidia’s 5th generation architecture, aka Pascal, features custom acceleration for deep learning and the discrete GPUs present will have up to 80 GB/s of bandwidth.

Each CPU complex will have access to its own integrated Pascal Cores (as well as a dedicated Pascal GPU over PCIe) and will be connected by a 1 Gb Ethernet connection. The discrete Pascal cores will have up to 4GB of GDDR5 memory (each) and will feature approximately 80 GB/s of bandwidth – which tells us that we are probably looking at low end (or custom) cores around the GP106 spectrum. They use a 128-bit interface that connects to four GDDR5 memory chips clocked at 1.25 GHz. The clock can go as high as 1.5 GHz for a total of 96 GB/s.

The Pascal cores used on the Drive PX 2 has a specialized instruction set that is designed to accelerate DNN performance on the go . The interface itself (of the PX 2 board) supports an IO of 70 Gigabits per second. Interestingly, Nvidia has put a lot of thought on redundancy and mission critical system safety. An ASIL-D safety micro controller is also present on the board itself. Not only that, but the hardware is AutoSAR compliant, and designed from the ground up to allow devs to take full advantage of the resources on the board.

Mark Cerny: 8 TFlops Minimal Is Required To Render In Native 4K But This Is A Personal Estimate
Product NameNVIDIA Drive PXNVIDIA Drive PX 2NVIDIA Drive PX 3?
SOC NameTegra X1ParkerXavier
Process Technology20nm SOC16nm FinFET16nm FinFET+
CPU8 Core CPU12 Core CPU8 Core CPU
CPU Architecture4 x A57
4 x A53 (Custom)
8 x A57
4 x Denver2
4 x ARM64-bit (Denver3)?
GPU ArchitectureMaxwellPascalVolta
Compute TFLOPs2.3 TFLOPs8 TFLOPsTBD
Compute DLTOPsN/A20 DLTOPs20 DLTOPs
Total Chips2 x Tegra X12 x Tegra X2
2 x Pascal MXM GPUs
1 x Xavier
System MemoryLPDDR48 GB LPDDR4 (50+ GB/s)TBD
Graphics MemoryN/A4 GB GDDR5 (80+ GB/s)N/A
TDP80W20W

Nvidia’s last financials indicated a very strong growth of their automotive department. The reason is of course that their Tegra chips are increasingly in demand as the ultimate choice to power digital cockpit systems for various automobile vendors. Nvidia has also been aspiring to break into the ADAS business with its new Drive PX chip. Infact, Elon Musk was present at CES this year when the CEO of Nvidia demonstrated the capabilities of the Drive PX board. This caused many to speculate that the board was present inside the Tesla models. This is however, not true, and you would be forgiven for thinking that the latest Tesla vehicles contain the module.

Nvidia’s previous generation of Tegra GPUs only powered the infotainment cluster aboard cars like the Tesla. It is apparent however, that Nvidia aims to change this with its successive designs – each concentrated on providing more and more power for DNN-based autonomous capabilities. In fact, the Drive PX2 board has already shipped to Tier 1 customers for an estimated price tag of $15000. That might sound like a steep price for a computer board, but considering how much a LIDAR based DNN system with actual dGPUs cost – this number amounts to mere pennies.

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