Intel’s Chip Manufacturing with 450mm Wafers delayed to 2023 Due to Low Utilization

Usman Pirzada
Posted Mar 9, 2014
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This news comes from a new source, so take it with a grain of salt. However the leak appears to be legit. 450mm Volume Production of Wafers appears to have been delayed to 2023. This conforms with what we already know about Intel’s Fab 42 decision and general low utilization of its plants.

Intel is sticking with 300mm for now – 450mm and EUV are apparently still quite far away

With Fab 42 on hold and Intels utilization low, it really shouldn’t come as a surprise that Intel is putting the 450mm shift on hold. If you don’t already know, the  450mm I am referring to is the size of the silicon wafer. Currently the silicon wafers have a diameter of 300mm, shifting to 450mm will net a gain in surface area of 125%. It should also reduce operating costs by 20-30%. However here’s the catch, the 450mm high volume production will in all probability miss the 10nm logic node and instead debut at around the tie of 7nm.

Therefore the second most pertinent question arises. EUV is basically a next generation technique called Extreme UltraVilot lithography which should allow us to go as low as 7nm with the current standard and 5m and below with significantly improved EUV system. However It would appear that fabs, Intel included, will just go for a traditional multi-patterning approach. Which will however become redundant soon after 10nm.

Ofcourse its not that simple. Multipatterning aside we should have made some headway into the realm of 450mm High Volume Production and more importantly EUV. The fact that we haven’t should set off a few alarm bells ringing.  Basically the sunk cost of this particular shift would be way to high, and with Intel’s fabs already under utilized and fab 42 on hold, this is the logical next step.


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