Intel is developing a wide variety of features for its 4th Generation core ‘Haswell’, these include a power efficenct design without compromising either CPU or GPU capabilities, revolutionary new overclocking features and to our recent knowledge, Intel Haswell would also feature an Integrated Voltage Regulator.
Xbitlabs (PCWatch)report that Intel Haswell is all set to incorporate an Integrated Voltage Regulator Module or VRM. Currently, VRMs and other power ICs are located on the motherboards with some manufacturer’s pushing to use Multi-Phase CPU power supplies for better voltage regulation. However, these Multi-Phase power supplies cost more adding to the motherboard’s price and also in reduced PCB space on-board. Much importantly, these VRM units don’t perform as well as Intel want’s to which brings the need to develop their own integrated VRMs for next-generation core architectures.
Intel Haswell Gets Integrated VRM with 320 Phases
Intel Haswell would be the first 22nm based SOC (System-On-Chip) design from Intel based on the 3D Tri-gate transistor technology. The integrated voltage regulator would relocate a small space on the Haswell die which would be dedicated to a special programmable chip with 20 Power Cells. Each power cell is an independent VR (Voltage-Regulator) with 16 Phase per cell supplying a rated current of 25A. With 20 Power Cells on board the chip, Intel Haswell would get 320 phase per chip which would feature active voltage positioning and current sharing for balance of power. The power cell chip featuring the 20 power cells would be built on a 22nm process technology, a single power cell would be 2.8mm2 in size.
These power cell chips would allow Intel Haswell would allow precise control for the power consumption of each core, graphics core, system agent.This would improve the performance for Intel Haswell without compromising its performance capabilities. While Intel Haswell would include the power cell chip, with Broadwell generation of CPUs would feature these power cell pre-built on to the die and would be a drastic improvement for SOC chips.